figure 1. ADSD-1410S functional block diagram features 14-bit resolution; 10msps sampling rate functionally complete; 2.5v input range no missing codes over full temperature range edge-triggered 5v supplies, 1.6 watts 76db snr, C83db thd ideal for both time and frequency domain applications the ADSD-1410S is a functionally complete, dual 14-bit, 10msps, sampling a/d converter. its standard, 40-pin, triple-wide smt dip contains two fast-settling sample/ hold ampli? ers, two 14-bit a/d converters, multiplexed output buffers, a precision reference, and all the timing and control logic necessary to operate from either two or a single start convert pulse. the ADSD-1410S is optimized for wideband frequency-domain applications and is fully fft tested. the ADSD-1410S requires only 5v supplies and typically consumes 1.6 watts. the digital output power supply is capable of directly driving 5v or 3v logic systems. models are available in either commercial 0 to +70c or military -55 to +125c operating temperature ranges. product overview functional block diagram ADSD-1410S dual 14-bit, 10msps sampling a/d converter ?? datel ? 11 cabot boulevard, mans? eld, ma 02048-1151 usa ? tel: (508) 339-3000 ? www.datel.com ? e-mail: help@datel.com 01 apr 2011 mda_ADSD-1410S.b02 page 1 of 5
analog inputs min. typ. max. units input voltage range input impedence input capacitance 610 2.5v 620 7 630 15 volts pf digital inputs logic levels logic "1" logic "0" logic loading "1" logic loading "0" +2.4 +0.8 +10 C10 volts volts a a performance integral non-linearity +25c (? n=10khz) 0 to +70c C55 to +125c differential non-linearity (f in = 10khz) +25c 0 to +70c C55 to +125c offset error +25c (see figure 3) 0 to +70c C55 to +125c gain error +25c (see figure 3) 0 to +70c C55 to +125c C0.99 C0.99 C0.99 1 1 2 0.5 0.5 0.75 0.25 0.25 0.5 0.3 0.3 0.6 +1.5 +1.5 +1.75 0.5 0.5 0.8 0.6 0.6 0.8 lsb lsb lsb lsb lsb lsb %fsr %fsr %fsr %fsr %fsr %fsr no missing codes 14 bits resolution C55 to +125c 14 bits outputs output coding logic level logic "1" v dd = +5v v dd = +3.3v logic "0" v dd = +5v v dd = +3.3v logic loading "1" v dd = +5v v dd = +3.3v logic loading "0" v dd = +5v v dd = +3.3v internal reference voltage, +25c 0 to +70c external current offset bin. +3.8 +2.48 +1.5 +1.5 +1.6 +1.6 +0.5 +0.5 C8 C4 +8 +4 +1.7 +1.7 5 volts volts volts volts ma ma ma ma volts volts ma dynamic performance min. typ. max. units total harm. distort. ( C0.5db) dc to 500khz 500khz to 5mhz signal-to-noise ratio (w/o distortion, C0.5db dc to 500khz 500khz to 5mhz signal-to-noise ratio (and distortion, C0.5db) dc to 500khz 500khz to 5mhz spurious free dyn. range ? dc to 500khz 500khz to 5mhz two-tone imd distortion (f in = 4.85mhz, fs = 10mhz, C0.5db) input bandwidth (C3db) small signal (C20db input) large signal (C0.5db input) aperture delay time aperature uncertainty s/h acq. time , (to 0.003%fsr) step input feedthrough rejection (f in = 5mhz) noise 74 74 72 72 C84 C83 76 76 75 75 C87 C86 C80 14 14 0.4 85 250 C80 C75 C82 C78 10 25 db db db db db db db db db mhz mhz ns ps, rms ns db vrms timing specifications conversion rate start convert high start convert low start convert to eoc eoc to data valid output disable delay 1 25 25 1 50 50 6 10 500 500 13 mhz ns ns ns power requirements power supply ranges C5v ee supply +5v cc supply v dd supply power supply currents C5v ee supply +5v cc supply v dd supply power dissipation power supply rejection C5.25 +4.75 +3.0 C100 C5.0 +5.0 +5.0 C89 +230 +2.0 1.6 C4.75 +5.25 vcc +245 +5.0 1.7 0.02 volts volts volts ma ma ma watts %fsr%v physical/environmental oper. temp. range, ambient ADSD-1410S ADSD-1410S-ex storage temperature range 0 C55 C65 +70 +125 +150 c c c package type 40-pin, smt tdip parameters limits units +5v cc supply (pins 2, 39) C5v ee supply (pins 9, 32) v dd supply (pin 12) digital inputs (pins 10, 11, 30, 31) analog input (pins 1, 40) lead temp. (10 seconds) 0 to +6 0 to C6 C0.3 to (v cc +0.3) C0.3 to (v dd +0.3) 7 +300 volts volts volts volts volts c footnote: ? same speci? cation as in-band harmonics and peak harmonics. functional specifications (t a = +25c, v cc = +5v, v dd = +5v, v ee = C5v, 10msps sampling rate,vin = 2.5v and a minimum 7 minute warmup unless otherwise speci? ed.) ADSD-1410S dual 14-bit, 10msps sampling a/d converter ?? datel ? 11 cabot boulevard, mans? eld, ma 02048-1151 usa ? tel: (508) 339-3000 ? www.datel.com ? e-mail: help@datel.com 01 apr 2011 mda_ADSD-1410S.b02 page 2 of 5
technical notes 1. rated performance requires using good high-frequency circuit board layout techniques. connect the digital and analog grounds to one point, the analog ground plane beneath the converter. due to the inductance and resis- tance of the power supply return paths, return the analog and digital ground separately to the power supplies. figure 2. ADSD-1410S timing diagram calibration procedure 1. connect the converter per figure 3. apply a pulse of 50 nanoseconds typical to start convert (pin 11) at a rate of 2mhz. this rate is chosen to reduce ? icker if led's are used on the outputs for calibration purposes. 2. zero (offset) adjustments apply a precision voltage reference source between analog input a (pin 1) and signal ground (pin 3), then adjust the reference source output per table 2. adjust trimpot r1 until the code ? ickers equally between 10 0000 0000 0000 and 10 0000 0000 0001. 3. repeat above step for analog input b (pin 40). use trimpot r2 for the zero (offset) adjustment . table 3. output coding output coding input range 2.5v bipolar scale msb lsb 11 1111 1111 1111 +2. 499695 +fs C 1lsb 11 1000 0000 0000 +1.875000 +3/4fs 11 0000 0000 0000 +1.250000 +1/2fs 10 0000 0000 0000 0.000000 0 01 0000 0000 0000 C1.250000 C1/2fs 00 1000 0000 0000 C1.875000 C3/4fs 00 0000 0000 0001 C2.499695 Cfs+1lsb 00 0000 0000 0000 C2.500000 Cfs table 2. offset adjustment input range offset adjust +1/2 lsb 2.5v +0.000153v 4. to con? rm proper operation of the device, vary the precision reference voltage source to obtain the output coding listed in table 3. ADSD-1410S dual 14-bit, 10msps sampling a/d converter ?? datel ? 11 cabot boulevard, mans? eld, ma 02048-1151 usa ? tel: (508) 339-3000 ? www.datel.com ? e-mail: help@datel.com 01 apr 2011 mda_ADSD-1410S.b02 page 3 of 5
thermal requirements the ADSD-1410S sampling a/d converter is fully characterized and speci? ed over the commercial operating temperature (ambient) range of 0 to +70c and military temperature range of C55 to +125c (ex suf? x). all room-temperature (t a = +25c) production testing is performed without the use of heat sinks or forced-air cooling. thermal impedance ? gures for each device are listed in their respective speci? cation tables. these devices do not normally require heat sinks, however, standard precautionary design and layout procedures should be used to ensure devices do not overheat. the ground and power planes beneath the package, as well as all pcb signal runs to and from the device, should be as heavy as possible to help conduct heat away from the package. electrically- insulating, thermally-conductive "pads" may be installed underneath the package. minimal air ? ow over the surface can greatly help reduce the package temperature. figure 3. ADSD-1410S connection diagram notes: ? outputs are enabled by either turning enable a (pin 10) or enable b (pin 31) low for respective analog inputs a or b. a high on both enable a and enable b results in disabling the output bus (high z). see timing diagram for details. ADSD-1410S dual 14-bit, 10msps sampling a/d converter ?? datel ? 11 cabot boulevard, mans? eld, ma 02048-1151 usa ? tel: (508) 339-3000 ? www.datel.com ? e-mail: help@datel.com 01 apr 2011 mda_ADSD-1410S.b02 page 4 of 5
mechanical dimensions inches (mm) model number operating temp. range ADSD-1410S 0 to +70c ADSD-1410S-ex C55 to +125c ordering information contact datel for high-reliability versions. 2.10 0.262 0.06 1.09 0.100 typ. 0.025 typ. 1.900 0.10 opening in shell to prevent fluid entrapment 0.015 thick copper leads bottom of leads to be coplanar to 0.005 input/output connections pin function pin function 1 input a 40 input b 2 +5va 39 +5va 3 analog ground 38 analog ground 4 n.c. 37 n.c. 5 offset a 36 offset b 6 range 35 n.c. 7 1.6v ref 34 eoc a 8 analog ground 33 analog ground 9 ?5v 32 ?5v 10 enable a 31 enable b 11 start a 30 start b 12 vdd 29 eoc b 13 bit 14 (lsb) 28 bit 1 (msb) 14 bit 13 27 bit 2 15 bit 12 26 bit 3 16 bit 11 25 bit 4 17 bit 10 24 bit 5 18 bit 9 23 bit 6 19 bit 8 22 bit 7 20 dgnd 21 dgnd ADSD-1410S dual 14-bit, 10msps sampling a/d converter . makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. the descriptions contained her ein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. speci? cations are subject to change without notice. www.datel.com ? e-mail: help@datel.com ?? datel 11 cabot boulevard, mans? eld, ma 02048-1151 usa itar and iso 9001/14001 registered 01 apr 2011 mda_ADSD-1410S.b02 page 5 of 5
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